Front side laser-based wafer dicing

ABSTRACT

A semiconductor die includes a substrate having a semiconductor surface layer bon a front side with active circuitry including at last one transistor therein and a back side. The sidewall edges of the semiconductor die have at least one damage region pair including an angled damage feature region relative to a surface normal of the semiconductor die that is above a damage region that is more normal to the surface normal of the die as compared to the angled damage feature region.

CROSS-REFERENCE TO RELATED APPLICATIONS

The present application is a Division of U.S. patent application Ser.No. 16/205,692, filed on Nov. 30, 2018, the contents of which are hereinincorporated by reference in its entirety.

FIELD

This Disclosure relates to laser-based wafer dicing.

BACKGROUND

Semiconductor die are typically manufactured by dicing a semiconductorsubstrate generally referred to as being a wafer that is at least 6inches in diameter (150 mm), such as 8 inches (200 mm) in diameter, or12 inches (300 mm) in diameter, that comprises a plurality ofsemiconductor die of a predetermined die size, into a plurality ofsingulated die. When dicing a wafer, an adhesive dicing tape is attachedon a back side surface of the wafer to prevent the die from fallingapart, and then the wafer is generally cut from the front side using amechanical saw to singulate the die. Mechanical dicing saws provide dieseparations of generally about 40 inn, so that the die separationscalled scribe streets between the die are made wide enough for suchcuts. The scribe streets may include metal containing test structures(e.g., drop-ins). At this time, the dicing tape attached to the backsurface of the wafer is slightly cut into its surface but not entirelycut through, and the semiconductor die remain held on the dicing tape.After singulation, a wafer expander is used to provide tape expansionthat spreads apart the singulated die to better enable a die picker topick up die one-by-one from the dicing tape, and are then transferred toa subsequent assembly step such as a die bonding step.

Laser saws for dicing are known as alternative to mechanical dicingsaws. Laser saws enable die separations of much less in width ascompared to mechanical saws, typically scribe streets only about 2 μmwide. Ablation lasers are known for laser dicing which ablate awaysubstrate material, where the focal point of the laser beam is at thesurface of the wafer and substrate material is removed by vaporizationduring the cutting. “Stealth laser dicers” are also known that utilize asub-surface wafer treatment using a pulsed laser beam at a wavelengththat transmits into the wafer. For silicon wafers, near-infrared (nearIR) lasers are used by stealth laser dicers because of the undesiredsilicon absorption of shorter wavelengths (e.g., visible light) bysilicon. Stealth laser dicers always dice the wafer beginning from theback side surface of the wafer due to reasons including needing adifferent configuration to handle the wafer on a flex frame duedifferent points of contact to transport a frame or wafer, and the needfor a new dicing tape or an unconventional backgrind tape on the frontside of the wafer that allows for near IR to transmit through it. Also,metal test structures that are generally positioned within the scribestreets will prevent the laser beam from penetrating into the siliconfrom the front side.

SUMMARY

This Summary is provided to introduce a brief selection of disclosedconcepts in a simplified form that are further described below in theDetailed Description including the drawings provided. This Summary isnot intended to limit the claimed subject matter's scope.

This Disclosure recognizes during conventional stealth laser dicing,because the laser beam is incident on the back side of the wafer, thelaser beam can refract off of cracks within the semiconductor substrate(e.g., wafer) formed during the scanning of the laser that disperse thebeam which can emerge on the front side of the wafer. The laser beamemerging from the front side of the wafer can cause damage to the activecircuitry (e.g., transistors) on the front side of the wafer causingdevice failures, such as due to electrostatic discharge (ESD) generateddamage that can cause short circuits. This refraction and resultingdamage to the die on the wafer may be called laser splash. Conventionalmethods for addressing laser splash adjust the laser dicing recipe byadjusting settings such as the laser power, the pulse frequency, and thelaser beam height.

This Disclosure includes a solution to laser splash during conventionalstealth laser dicing by having the point of entry of the laser beam bethrough the active front side of the wafer in the scribe streets asopposed to the conventional backside point of entry of the laser beam inthe scribe streets. By disclosed laser scanning with the point of entryfor the laser beam being through the front side of the wafer, lasersplash if present occurs on the back side of the wafer which avoids ESDdamage to the active circuitry, so that one can use a higher laser powersince the laser splash occurs on the back side of the wafer opposite tothe front side. Higher power laser beams allow for increased dieseparation ability on relative small area and thick die. Disclosedsolutions generally do not decrease throughput or require a lengthychangeover of laser dicer parts.

Disclosed stealth laser dicing methods also leave a traceable mark onthe singulated silicon die that evidences entry of the IR laser beamthrough scribe lines on the front side of a semiconductor die. Thusafter disclosed stealth laser dicing, a semiconductor die that includesa substrate having a semiconductor surface layer on a front side withactive circuitry that includes at last one transistor therein and a backside, has sidewall edges of the semiconductor die having at least onedamage region pair. The damage region pair includes an angled damagefeature region relative to a surface normal of the semiconductor diethat is above a damage region that is more normal to the surface normalof the die as compared to the angled damage feature region.

BRIEF DESCRIPTION OF THE DRAWINGS

Reference will now be made to the accompanying drawings, which are notnecessarily drawn to scale, wherein:

FIG. 1 is depiction of a laser dicing system implementing a disclosedmethod of front side laser-based wafer dicing, according to an exampleaspect.

FIG. 2 is a flow chart that shows steps in an example method of frontside laser-based wafer dicing.

FIG. 3 is a cross sectional depiction of the sidewall of a semiconductordie derived from a transmission electron microscope (TEM) image afterbeing diced by a laser dicer following a disclosed method of front sidelaser-based wafer dicing followed by singulation by a die expander,according to an example aspect.

DETAILED DESCRIPTION

Example aspects in this Disclosure are described with reference to thedrawings, wherein like reference numerals are used to designate similaror equivalent elements. Illustrated ordering of acts or events shouldnot be considered as limiting, as some acts or events may occur indifferent order and/or concurrently with other acts or events.Furthermore, some illustrated acts or events may not be required toimplement a methodology in accordance with this disclosure.

Also, the terms “coupled to” or “couples with” (and the like) as usedherein without further qualification are intended to describe either anindirect or direct electrical connection. Thus, if a first device“couples” to a second device, that connection can be through a directelectrical connection where there are only parasitic s in the pathway,or through an indirect electrical connection via intervening itemsincluding other devices and connections. For indirect coupling, theintervening item generally does not modify the information of a signalbut may adjust its current level, voltage level, and/or power level.

FIG. 1 is depiction of a laser dicing system implementing a disclosedmethod of front side laser-based wafer dicing, according to an exampleaspect. The laser dicing system includes a laser module 130 forgenerating an IR laser beam 131 that is generally a near-IR laser havinga modulator for generating a pulsed IR beam, and a focusing lens 135that may be referred to as a condensing lens. The laser module 130 alsogenerally includes a scanner for scanning the laser beam at a selectedscan rate. The laser dicing system is shown lasering a wafer 105 thatincludes a front side 105 a having active circuitry (e.g., transistors)including scribe streets 106 with die comprising active circuitry 107positioned between the scribe streets 106. The wafer is shown on adicing tape 118.

The scribe streets 106 are generally exclusive of metal thereon as thescribe streets should be free of any metal because test structureshaving metal in the scribe street 106 in the beam path will tend toprevent the IR laser beam 131 from reaching the wafer 105, which cancomprise silicon or another substrate material. The metal in the scribestreets 106 can be removed prior to laser dicing. Alternatively, thewafer fab can also omit metal in the scribe streets during thefabrication process so that metal removal before laser dicing is notnecessary.

However, one can generally also have some ‘dummy’ fill metal in someportions of the scribe streets for physical stability of the wafer,where the dummy fill metal pattern has gaps of sufficient size thatprovide a clear path that is metal free for the IR laser beam directedinto the gaps to pass through. For example, the dummy fill pattern caninclude 3 μm metal squares that are in offset rows that have a 3 μm gapbetween adjacent metal squares. This generally provides a sufficientsized gap for most focused IR laser beams to enter the wafer. Also, intheory one can have a super thin metal layer (e.g., <20 nm thick, suchas 5 to 10 nm thick) that may provide a sufficient IR beamtransmittance.

The IR laser beam 131 is at a wavelength capable of transmitting throughthe wafer 105 and is directed so that a point of entry of the laser beam131 is within the scribe streets 106 on the front side 105 a of thewafer. A focal point of the IR laser beam 131 is configured to beembedded within a thickness of the wafer 105 so that laser scanningforms at least one subsurface laser modified region 119 that may be 5 to15 μm thick. The focal point 121 of the IR laser beam 131 is at the dotshown in FIG. 1 . This internal focal point 121 ensures that refractedlaser beams shown as splash beam 131′ arrive at the back side 105 b ofthe wafer 105 where there is no active circuitry 107 to be damaged. Thesubsurface laser modified region 119 next to the focal point 121 in thecase the wafer 105 is single crystal silicon is polycrystalline with ahigh dislocation density formed by the rapid melting and solidificationof the irradiated region near the focal point 121. Cracks 127 extendingto the back side 105 b formed by the laser scanning are also shown.

In lasing operation, the IR laser beam 131 is typically pulsed at afrequency of about 50 kHz to 200 kHz, such as 100 kHz, while the wafer105 is moved relative to the IR laser beam 131 with a velocity of about0.5 m/sec to 2 m/s. The IR laser beam 131 is scanned to stay within thescribe streets 106 to encircle each die on the wafer 105 with subsurfacelaser modified regions 119.

The laser module 130 can comprise a pulsed Nd:YAG laser outputting awavelength of 1,064 nm which can be used for silicon dicing applicationsbecause the room temperature band gap of silicon is about 1.11 eV (1,117nm), so that maximum laser absorption can be adjusted by opticalfocusing. There can be subsurface laser modified regions formed at twodifferent levels in the wafer 105 as shown in FIG. 3 described below,using first and second laser beams having different incident angles(relative to a top surface of the wafer) used in a single pass, or usinga first pass with a first laser beam and a second pass with a secondlaser beams, where the first and second laser beams have different focalpoints. Generating two or more damage regions at different depths (seelaser damage regions 308/309 above the laser damage regions 318/319 inFIG. 3 described below) may be desirable to provide cracking essentiallythroughout a thickness of the wafer (if the wafer is thin enough) or tofacilitate cracking throughout a thickness of the wafer by a subsequentexpanding process. Two or more damaged regions provide more crackpropagation as compared to one damage region, which also allows one toseparate thicker die. After laser dicing the wafer is generally on adicing tape 118 which is then expanded in a die expander apparatus toinitiate or increase the cracks starting with cracks 127 in thesubsurface laser modified regions 119 that propagate along a thicknessdirection of the wafer 105 to dice the wafer 105 into separateindividual ones of the semiconductor die. The wafer 105 is generally notsingulated until after die expanding unless it is relatively thin (e.g.,<50 μm thick).

The laser module 130 integrated with the optical system including thefocusing lens 135 can optionally be incorporated into a dicing machine.For example, Tokyo Seimitsu's Mahoh laser dicing machine (ML200/ML300)and in Disco Corp.'s DFL7340/DFL7360 laser dicing machines. Fordisclosed aspects no hardware modification of the laser dicer isgenerally needed.

Disclosed front side laser-based wafer dicing operates as a two-stageprocess in which embedded defect regions are first introduced into thewafer by scanning an IR laser beam 131 along intended cut lines. Thenthe wafer on an underlying die attach tape is generally expanded using awafer frame to induce fracture in the defect regions formed in the firststep.

FIG. 2 is a flow chart that shows steps in an example method 200 offront side laser-based wafer dicing of a semiconductor substrate (e.g.,wafer). Step 201 comprises positioning the wafer on a tape material. Thetape can be on the front side of the wafer if the wafer materialtransparent to the IR wavelength used, or the back side of the substratecan be on a tape (dicing or backgrind tape). The wafer has at least asemiconductor surface on its front side 105 a including a plurality ofsemiconductor die having active circuitry on separated by scribe streets106. The thickness of the wafer is generally 40 μm to 150 μm, which isprovided generally following backgrinding. As described above the scribestreets can be exclusive of metal thereon, which can be removed in thefabrication facility or omitted all together.

Step 202 comprises directing at least one IR laser beam that is at awavelength capable of transmitting through the wafer with a point ofentry at the scribe streets 106, wherein the IR laser beam is focusedwith a focal point embedded within a thickness of the wafer. Step 203comprises scanning the IR laser beam relative to the wafer alongintended cutting lines in the scribe streets to form subsurface lasermodified defect regions. Step 204 comprises expanding the wafer toprovide mechanical loading to cleave across a thickness of thesemiconductor die at the defect regions and to increase a die-to-die gapof the semiconductor die to dice the wafer into separate ones of thesemiconductor die.

Semiconductor die after disclosed laser dicing have distinctive featuresresulting from the IR laser beam's entry from the front side of thesemiconductor die. Disclosed semiconductor die after the scanning havesidewall edges having at least one damage region pair comprising anangled damage feature region relative to a surface normal of thesemiconductor die that is above a damage region that is more normal tothe surface normal of the die as compared to the angled damage featureregion. The angled damage feature region has cracks that average atleast 5 degrees more relative to the surface normal as compared tocracks in the damage region. These aspects are discussed in FIG. 3described below.

As described above, because disclosed methods use a point of entry ofthe IR laser beam 131 from the front side 105 a of the wafer 105 withthe active circuitry 107 between the scribe streets 106, the activecircuitry 107 will not risk splash damage regardless of recipe settings,because any splashed material from the splash beam 131′ emerges from theback side 105 b of the wafer 105. Advantages of disclosed solutionsinclude better laser dicing performance since laser splash is no longera concern, and the laser dicing recipe can be changed to achieve thebest separation (higher power) for an increased polysilicon layer sizewith the fewest passes (higher throughput). Small die capabilities arealso improved. Laser dicing is currently limited by minimum die size inpart due to achieving separation of the wafer. Recipes with betterseparation performance will increase the possible die sizes for laserdicing. Laser dicing recipe robustness is also improved. Some devicesare more sensitive to laser splash damage than others. This can ensurethat if a recipe sees good die separation performance, devicesensitivity will not be a factor.

Examples

Disclosed aspects are further illustrated by the following specificExamples, which should not be construed as limiting the scope or contentof this Disclosure in any way.

As noted above, disclosed stealth laser dicing methods leave a traceablemark on the singulated silicon die that evidences entry of the IR laserbeam through scribe lines on the front side of a semiconductor die. FIG.3 is a cross sectional depiction of a sidewall 300 of a semiconductordie 305 comprising silicon having a front side 305 a with activecircuitry 107 extending down to the dashed lines shown, that has a backside 305 b opposite the front side 305 a, derived from a TEM image afterbeing diced by a die expander following a disclosed method of front sidelaser-based wafer dicing, followed by wafer expanding. The sidewall 300evidences the entry point of the IR laser beam 131 was on the front side305 a by showing an angled laser-damage region 308 comprising cracks inlargely single crystal silicon that is angled relative to the surfacenormal of the die and is closer to the front side 305 a as compared tothe laser-damage region 309 under the angled laser-damage region 308that has damage regions which are more normal to the surface normal ofthe semiconductor die. The cracks in the angled damage feature region308 average at least 5 degrees more relative to the surface normal ascompared to the cracks in the laser-damage region 309.

Also shown below the laser-damage region 309 is another laser-damageregion 318 of cracks in largely single crystal silicon that is angledrelative to the surface normal of the semiconductor die 305 that iscloser to the front side 305 a as compared to laser-damage region 319under the laser-damage region 318 that is more normal to the surfacenormal of the die. The respective damage regions pairs 308/309 and318/319 can be formed by using a single IR laser beam that is split intotwo beams sharing a focal point, but a different incident angle relativeto the top surface of the wafer, or by using two separate IR laser beamshaving different focal points. As described above, having two or moredamage regions at different depths may be desirable to provide crackingessentially throughout a thickness of the wafer (if the wafer is thinenough) or to facilitate cracking throughout a thickness of the wafer bya subsequent expanding process.

Those skilled in the art to which this Disclosure relates willappreciate that many other variations are possible within the scope ofthe claimed invention, and further additions, deletions, substitutionsand modifications may be made to the described aspects without departingfrom the scope of this Disclosure.

What is claimed is:
 1. A semiconductor die, comprising: a substrateincluding a semiconductor surface layer on a front side with activecircuitry comprising at last one transistor therein and a back side,wherein sidewall edges of the semiconductor die have at least one damageregion pair comprising an angled damage feature region relative to asurface normal of the semiconductor die that is above a damage regionthat is more normal to the surface normal of the semiconductor die ascompared to the angled damage feature region.
 2. The semiconductor dieof claim 1, wherein edges of the semiconductor die are exclusive ofmetal.
 3. The semiconductor die of claim 1, wherein the substratecomprises silicon.
 4. The semiconductor die of claim 1, wherein the atleast one damage region pair comprises a first damage region pair spaceapart from a second damage region pair.
 5. The semiconductor die ofclaim 1, wherein the angled damage feature region has cracks thataverage at least 5 degrees more relative to the surface normal ascompared to cracks in the damage region.